Ethernet has now arrived on a broad front in industry and has worked its way into the field level. However, just as with classic fieldbuses, there are physical limits to Industrial Ethernet in the age of digitalization. The majority of common protocols today allow cyclical data exchange with field devices in the range of less than 100 µs or in some cases significantly less - Ethercat, for example, offers a cycle time of 31.25 µs and can therefore also be used for fast drive solutions.

However, Thomas Leyrer, System Application Manager at Texas Instruments (TI), is convinced that even shorter cycle times in the range of less than 10 µs are required in order to penetrate even further into the field level to signal acquisition and signal generation. The Simple Open Real-Time Ethernet - SORTE for short - protocol, which TI is presenting to the specialist audience for the first time in Nuremberg, falls below precisely these limits. According to Leyrer, it will enable a cyclical data exchange of 4 µs with several participants in the future. The SORTE protocol offers all the familiar features of Industrial Ethernet such as topology detection, time synchronization, online engineering and diagnostics. The only restriction: the data volume per 4-µs cycle is limited to 16 bytes per direction.

According to Thomas Leyrer, the main difference between the new SORTE and existing protocols lies in the dynamic definition, processing and error detection of packets. While protocols such as Ethercat and Profinet work with fixed formats and procedures, SORTE can determine which parameters are used for each packet and status. In other words, packet forwarding can be selected between the repeater (Powerlink), continuous (Ethercat) or cut-through (Profinet) operating modes.

How the TI solution works

To achieve 4 µs cycle time, the TI solution utilizes all hardware features of the Ethernet physical layer (short packet length, short preamble and short distance between packets) as well as the programmable data link layer. TI's new Industrial Ethernet Phy DP83822I supports packets with a one-byte preamble and a minimum inter-packet distance of less than 200 ns. The Industrial Commucation Subsystem (ICSS) on Sitara processors uses different procedures for forwarding the packets depending on the status. The checksum is also dynamically adapted to the packet length. SORTE will be demonstrated at the TI stand using a 4-axis CNC controller that controls power drivers with a maximum step frequency of 250 kHz in a packet-oriented manner. In this application, the step and direction signal as well as the current values of the driver stage are digitized and transmitted via the SORTE protocol.

According to Leyrer, the switch from signal-based control and evaluation of drives to packet-based processing offers significant advantages: "The susceptibility to interference of discrete signals in the vicinity of electronic loads is a source of error that is eliminated by packet transmission with checksum. In addition, the wiring effort is reduced by switching from (analog) point-to-point wiring to the line or ring structure that is common with Ethernet. Last but not least, 100 Mbit/s packets allow considerably more data to be exchanged in both directions than hard-wired control and measurement signals. This enables slip detection in real time, for example, without having to interrupt the milling process."

Another field of application for the short cycle time is position encoders, which today transmit the motor position via RS485 point-to-point wiring in 10 µs. With the SORTE protocol, it is now possible to connect several encoders in line and transmit more diagnostic data with 10 times the bandwidth. With a cycle time of 4 µs for the position data, faster current controllers can also be used or the position values can be transmitted redundantly for safe drive solutions.

The solution is available on the TI website under TI Designs TIDEP0085 (SORTE Master) and TIDEP 0086 (SORTE Slave) as open source code with a detailed description. The protocol runs on the processor families AM335x, AM437x, AM57xx, 66AK2G and is widely scalable for implementation at field level.