Mathworks wins the Embedded Award 2017 with its product 'HDL Coder Native Floating Point' in the 'Tools' category. The picture shows, from left to right, Richard Krowoza (NürnbergMesse), Philipp Diebenbusch, Dr. Werner Bachhuber, Dr. Frank M. Graeber (all three MathWorks) and Benedikt Weyerer (NürnbergMesse). The award-winning product is a tool for use in applications with a large dynamic range, such as signal processing or motor control applications. With 'Native Floating Point', synthesizable VHDL or Verilog can be generated directly from single-precision Simulink models. The traditional conversion to fixed point data types is no longer necessary thanks to the use of the HDL coder. This relieves the developers and saves time. 'HDL Coder Native Floating Point' generates target-independent, readable, traceable and synthesizable RTL (Register Transfer Level) models, even for numerous mathematical and trigonometric operators. This innovative technology does not require floating point processing units or hard floating point DSP blocks on the target ASIC or FPGA and can even be extended to embedded processors and programmable logic controllers that do not have integrated floating point units.